國立台灣大學 電子設計自動化實驗室
   
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2020-02 ACM/IEEE Design Automation Conference (DAC2020) Paper title: Via-based Redistribution Layer Routing for InFO Packages with Irregular Pad Structures,温祥廷 (Hsiang-Ting Wen), 蔡宇傑(Yu-Jie Cai), 徐暘(Yang Hsu) and 張耀文 (Yao-Wen Chang)
2020-02 ACM/IEEE Design Automation Conference (DAC2020) Paper title: Topological Structure and Physical Layout Codesign for Wavelength-Routed Optical Networks-on-Chip, 呂祐昇 (Yu-Sheng Lu), 游昇融 (Sheng-Jung Yu), and 張耀文 (Yao-Wen Chang)
2020-02 ACM/IEEE Design Automation Conference (DAC2020) Paper title: A Provably Good Wavelength-Division-Multiplexing-Aware Clustering Algorithm for On-Chip Optical Routing, 呂祐昇 (Yu-Sheng Lu), 游昇融 (Sheng-Jung Yu), and 張耀文 (Yao-Wen Chang)
2020-02 ACM/IEEE Design Automation Conference (DAC2020) Paper title: Latch Clustering for Timing-Power Co-Optimization, 黃朝琴 (Chau-Chin Huang), Gustavo Tellez, Gi-Joon Nam, and 張耀文 (Yao-Wen Chang)
2020-02 ACM/IEEE Design Automation Conference (DAC2020) Paper title: Hamiltonian Path Based Mixed-Cell-Height Legalization for Neighbor Diffusion Effect Mitigation, 陳建利 (Jianli Chen), 朱自然 (Ziran Zhu), Qinghai Liu, Yimin Zhang, 朱文興 (Wenxing Zhu), and 張耀文 (Yao-Wen Chang)
2020-02 ACM/IEEE Design Automation Conference (DAC2020) Paper title: Time-Division Multiplexing Based System-Level FPGA Routing for Logic Verification, Peng Zou, Zhifeng Lin, Xiao Shi, Yingjie Wu, 陳建利 (Jianli Chen), 俞軍 (Jun Yu), and 張耀文 (Yao-Wen Chang)
2020-02 ACM/IEEE Design Automation Conference (DAC2020) Paper title: An Efficient EPIST Algorithm for Global Placement with Non-Integer Multiple-Height Cells, 陳建利 (Jianli Chen), Zhipeng Huang, Ye Huang, 朱文興 (Wenxing Zhu), 俞軍 (Jun Yu) and 張耀文 (Yao-Wen Chang)
2019-09 IEEE/ACM Asia South Pacific Design Automation Conference (ASP-DAC-2019) Paper title: Unified redistribution layer routing for 2.5D IC packages, 蔣君涵 (Chun-Han Chiang), 莊馥宇 (Fu-Yu Chuang), and 張耀文(Yao-Wen Chang)
2019-08 IEEE/ACM International Conference on Computer-Aided Design (ICCAD2019) Paper title: Obstacle-aware group-based length-matching routing for pre-assignment area-I/O flip-chip designs, 張育瑄 (Yu-Hsuan Chang), 温祥廷 (Hsiang-Ting Wen), and 張耀文 (Yao-Wen Chang)
2019-08 IEEE/ACM International Conference on Computer-Aided Design (ICCAD2019) Paper title: Graph- and ILP-based cut redistribution for two-dimensional directed self-assembly, 王占翎 (Zhan-Ling Wang), and 張耀文 (Yao-Wen Chang)
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Company: Electronic Design Automation Lab, National Taiwan University
Address: BL406, No. 1, Sec. 4, Roosevelt Road, Taipei 10617, Taiwan (R.O.C.)
Phone: +886-2-3366-3700 - 6406, +886-2-2363-5251 - 6406
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