| Education |
- 2006-present:
Ph.D. Candidate,
Graduate Institute of Electronics Engineering,
National Taiwan University
- 2005-2006:
M.S. program,
(approved for the entrance into Ph.D. program directly in
2006)
Graduate Institute of Electronics Engineering,
National Taiwan University
- 2001-2005:
B.S.,
Dept. of Computer Science & Information Engineering,
National Taiwan University
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| Research Interests
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- Electronics design automation (with emphasis on physical
design for nanometer IC technologies, SoC integration, large-scale global routing, DFM, and flip-chip design)
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| Publications |
- ACM/IEEE Conference Papers
- J.-W. Fang, C.-H.
Hsu, and Y.-W. Chang, "An
Integer Linear Programming Based Routing Algorithm for
Flip-Chip Design," in Proceedings of ACM/IEEE Design
Automation Conference (DAC-2007), San Diego, CA, June
2007. (Best Paper Nominee; received the highest score
in the beyond-die track)
- C.-H.
Hsu, H.-Y. Chen, and
Y.-W. Chang, "Multi-layer Global Routing Considering Via
and Wire Capacities," in Proc. of IEEE/ACM
International Conference on Computer-Aided Design (ICCAD),
San Jose, CA, Nov. 2008.
- H.-Y. Chen, C.-H. Hsu, and Y.-W. Chang, "High-Performance Global Routing with Fast Overflow Reduction," in Proc. of ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 582-587, Yokohama, Japan, January 2009.
- C.-H. Hsu, Y.-W. Chang, and Sani R. Nassif, "Simultaneous Layout Migration and Decomposition for Double Patterning Technology," to appear in Proc. of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA, Nov. 2009.
- ACM/IEEE
Journal Papers
- J.-W. Fang, C.-H.
Hsu, and Y.-W. Chang, "An
integer linear programming based routing algorithm for
flip-chip designs," in IEEE Trans. Computer-Aided
Design.
- Other Conference Papers
- S.-J. Chou, C.-H.
Hsu, J.-H. Jiang, and Y.-W.
Chang, "Statistical Timing-Yield Optimization via Latch
Substitution," The 17th VLSI Design/CAD Symposium, Hua-Lien,
Taiwan, August 2006.
- C.-H.
Hsu, S.-J. Chou, J.-H. Jiang,
and Y.-W. Chang, "A Statistical Approach to the
Timing-Yield Optimization of Pipeline Circuits,"
Proc. Int'l Workshop on Power and Timing
Modeling, Optimization and Simulation (PATMOS), Göteborg,
Sweden, September. 2007.
- C.-H.
Hsu, H.-Y.
Chen, and Y.-W.
Chang, "Global Routing with Via/Wire Capacity
Considerations," in
the 19th VLSI Design/CAD Symposium,
Pingdon,
Taiwan, August 2008.
- C.-H.
Hsu, H.-Y.
Chen, and Y.-W.
Chang, "Fast Global Routing with
Forbidden-Region Rerouting," in
the 19th VLSI Design/CAD Symposium,
Pingdon,
Taiwan, August 2008.
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| Experiences |
- Visiting Scholar at IBM Austin Research Lab, May 2009--present.
- Paper Reviewer, TCAD, DAC, ICCAD,
ISPD, ASP-DAC, DATE, VLSI-TSA, SOCC, and FPT, 2005--present.
- Teaching Assistant, DFM, GIEE, NTU, Spring 2009.
- Teaching Assistant, Algorithm, Dept. of EE, NTU, Fall 2008.
- Research Assistant, Synopsys Taiwan Ltd., Mar. 2008--present.
Project "Concurrent Routing for Double Patterning Technology"
- Research Assistant, National Science Council, Taiwan, Aug. 2007-Jul. 2008, Project "Manufacturability and Reliability for Nanometer Technologies and Physical Design Challenges" (國科會奈米IC設計之前瞻電子設計自動化技術--子計畫五：在奈米製程下考量可 製造性和可靠度之實體設計) (96-2628-E-002-248-MY3)
- Research Assistant, Quanta Corp., Mar. 2004--Feb. 2007
Project "Comprehensive Environment for PCB Design"
- Application Developer/Web Maintainer, Graduate Institute of
Electronics Engineering, NTU, Feb. 2006--Aug. 2008
- Administration Staff, The 3nd EDA Workshop,
SunMoonLake,
Taiwan, July, 2007
- Administration Staff, The 2nd EDA Workshop, E-Land,
Taiwan, July, 2006
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| Honors |
- Contest
- The 3rd Prize, IC/CAD Contest, Ministry of Education, 2009.
- The 2nd Place, ACM ISPD 2008
Global Routing Contest. (NTUgr)
(ACM/ISPD 2008 Global Routing 世界程式競賽第二名)
- National Contestant, Domestic
CADathlon Competition, Ministry of Education, Taiwan,
2007.
(獲選為台灣代表隊，參加2007年國際 ACM CADathlon at ICCAD 競賽)
- The 1st Prize, IC/CAD Contest, Ministry of
Education, 2007.
- The 1st Prize, IC/CAD Contest, Ministry of
Education, 2005. (The 1st place in 126 teams.)
- Scholarship
- SpringSoft EDA Scholarship for ICCAD regular papers, 2009.
(思源科技教育基金會 ICCAD 論文獎)
- 潘文淵文教基金會獎學金 (博士班), 2009
- GIEE Annual Award, January 2009.
(台灣大學電子所年度榮譽獎)
- NTU Outstanding Scholarship, Dec 2008.
(國立台灣大學傑出表現獎學金)
- Travel Grant, Foundation for the Advancement of Outstanding Scholarship, 2008.
(財團法人傑出人才發展基金會優秀學生出國開會獎學金)
- SpringSoft EDA Scholarship for
ICCAD regular papers, 2008.
(思源科技教育基金會 ICCAD 論文獎)
- Synopsys Scholarship for EDA Ph.D Student in
Taiwan, 2007.
(台灣新思科技有限公司贊助 EDA 領域博士班研究生獎學金)
- SpringSoft EDA Scholarship for
DAC regular papers, 2007.
(思源科技教育基金會 DAC 論文獎)
- tsmc NTU-EDA Fellowship for Ph.D. Student, 2006.
(台積電贊助台大電子所EDA組博士班研究生獎學金)
- NTU
Outstanding Scholarship, Dec 2005.
(國立台灣大學傑出表現獎學金)
- 宗倬章先生教育基金會獎助學金, 2004
- 潘文淵文教基金會獎學金 (大學部), 2002
- Other
- The 1st Rank Student Award, Group EDA, Graduate Institute of Electronics Engineering, NTU,
2008.
(台灣大學電子所EDA組博士班成績第一名)
- Certification of Reading and Writing, Language Center, NTU, 2007.
(台灣大學語言中心英文讀寫訓練証書)
- The 2nd Rank Student Award, Group EDA, Graduate Institute of Electronics Engineering, NTU,
2007.
(台灣大學電子所EDA組博士班成績第二名)
- The Presidential Award, National Taiwan University,
Spring 2002. (台大書卷獎)
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Last Update: Octobor 29, 20089
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